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| a FEATURES Very Low Noise 5 nV//Hz @ 1 kHz Max / Excellent Input Offset Voltage 75 V Max Low Offset Voltage Drift 1 V/ C Max Very High Gain 1500 V/mV Min Outstanding CMR 106 dB Min Slew Rate 2.4 V/ s Typ Gain Bandwidth Product 5 MHz Typ Industry-Standard 8-Lead Dual Pinout GENERAL DESCRIPTION Dual Very Low Noise Precision Operational Amplifier OP270 CONNECTION DIAGRAMS 16-Lead SOIC (S-Suffix) -IN A 1 +IN A 2 NC 3 V- 4 NC 5 +IN B 6 -IN B 7 NC 8 16 OUT A 15 NC 14 NC 8-Lead PDIP (P-Suffix) 8-Lead CERDIP (Z-Suffix) OUT A 1 -IN A 2 +IN A 3 V- 4 OP270 A B 8 7 6 5 V+ OUT B -IN B +IN B OP270 13 V+ 12 NC 11 NC 10 OUT B 9 NC The OP270 is a high performance, monolithic, dual operational amplifier with exceptionally low voltage noise, 5 nV//Hz max at 1 kHz. It offers comparable performance to ADI's industry standard OP27. The OP270 features an input offset voltage below 75 mV and an offset drift under 1 mV/C, guaranteed over the full military temperature range. Open-loop gain of the OP270 is over 1,500,000 into a 10 kW load, ensuring excellent gain accuracy and linearity, even in high gain applications. Input bias current is under 20 nA, which reduces errors due to signal source resistance. The OP270's CMR of over 106 dB and PSRR of less than 3.2 mV/V significantly reduce errors due to ground noise and power supply fluctuations. Power consumption of the dual OP270 is one-third less than two OP27s, a significant advantage for power conscious applications. The OP270 is unity-gain stable with a gain bandwidth product of 5 MHz and a slew rate of 2.4 V/ms. NC = NO CONNECT The OP270 offers excellent amplifier matching, which is important for applications such as multiple gain blocks, low noise instrumentation amplifiers, dual buffers, and low noise active filters. The OP270 conforms to the industry-standard 8-lead DIP pinout. It is pin compatible with the MC1458, SE5532/A, RM4558, and HA5102 dual op amps, and can be used to upgrade systems using those devices. For higher speed applications, the OP271, with a slew rate of 8 V/ms, is recommended. For a quad op amp, see the OP470. SIMPLIFIED SCHEMATIC (One of Two Amplifiers Is Shown) V+ BIAS OUT -IN +IN V- REV. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective companies. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 (c) 2003 Analog Devices, Inc. All rights reserved. OP270-SPECIFICATIONS (V PARAMETER SYMBOL CONDITIONS S = 15 V, TA = 25 C, unless otherwise noted.) OP270E MIN TYP MAX OP270F MIN TYP MAX MIN OP270G TYP MAX UNIT Input Offset Voltage Input Offset Current Input Bias Current Input Noise Voltage Input Noise Voltage Density VOS lOS IB en p-p en Input Noise Current Density Large-Signal Voltage Gain Input Voltage Range Output Voltage Swing Common-Mode Rejection Power Supply Rejection Ratio Slew Rate Supply Current (All Amplifiers) Gain Bandwidth Product Channel Separation in AVO IVR VO CMR PSRR SR ISY GBP CS VCM = 0 V VCM = 0 V 0.1 Hz to 10 Hz (Note 1) fO = 10 Hz fO = 100 Hz fO = 1 kHz (Note 2) fO = 10 Hz fO = 100 Hz fO = 1 kHz VO = 10 V RL = 10 kW RL = 2 kW (Note3) RL 2 kW VCM = 11 V VS = 4.5 V to 18 V No Load 10 1 5 80 3.6 3.2 3.2 1.1 0.7 0.6 1500 750 12 12 106 75 10 20 200 6.5 5.5 5.0 20 3 10 80 3.6 3.2 3.2 1.1 0.7 0.6 1000 500 12 12 100 1700 900 12.5 13.5 120 1.0 1.7 2.4 4 5 150 15 40 200 6.5 5.5 5.0 50 5 15 80 3.6 3.2 3.2 1.1 0.7 0.6 750 350 12 12 90 1500 700 12.5 13.5 110 1.5 1.7 2.4 4 5 250 20 60 mV nA nA nV p-p nV//Hz / / nV//Hz nV//Hz / pA//Hz / / pA//Hz pA//Hz / V/mV V/mV V V dB 2300 1200 12.5 13.5 125 0.56 3.2 5.6 6 mV/V V/ms mA MHz 1.7 2.4 4 5 6.5 6.5 6.5 VO = 20 V p-p fO = 10 Hz (Note 1) 125 175 3 0.4 20 125 175 3 0.4 20 5 175 3 0.4 20 5 dB pF MW GW ms Input Capacitance Input Resistance Differential-Mode Input Resistance Common-Mode Settling Time CIN RIN RINCM tS AV = +1, 10 V Step to 0.01% 5 NOTES 1. Guaranteed but not 100% tested. 2. Sample tested. 3. Guaranteed by CMR test. Specifications subject to change without notice. -2- REV. C SPECIFICATIONS ELECTRICAL SPECIFICATIONS PARAMETER SYMBOL OP270 (Vs = 15 V, -40C TA 85 C, unless otherwise noted.) OP270E MIN TYP MAX OP270F MIN TYP MAX MIN OP270G TYP MAX UNIT CONDITIONS Input Offset Voltage Average Input Offset Voltage Drift Input Offset Current Input Bias Voltage Large-Signal Voltage Gain Input Voltage Range* Output Voltage Swing Common-Mode Rejection Power Supply Rejection Ratio Supply Current (All Amplifiers) * Guaranteed by CMR test. VOS TCVOS IOS IB AVO IVR VO CMR PSRR ISY VCM = 0 V VCM = 0 V VO = 10 V RL = 10 kW RL = 2 kW RL 2 kW VCM = 11 V VS = 4.5 V to 18 V No Load 25 0.2 1.5 6 1000 500 12 12 100 150 1 30 60 600 300 12 12 94 5.6 7.2 45 0.4 5 15 1400 700 12.5 13.5 115 1.8 4.4 275 2 40 70 400 225 12 12 90 10 7.2 100 0.7 15 19 1250 670 12.5 13.5 100 2.0 4.4 400 3 50 80 mV mV/C nA nA V/mV V/mV V V dB 1800 900 12.5 13.5 120 0.7 4.4 1.5 7.2 mV/V mA Specifications subject to change without notice. REV. C -3- OP270 ABSOLUTE MAXIMUM RATINGS 1 Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V Differential Input Voltage2 . . . . . . . . . . . . . . . . . . . . . . 1.0 V Differential Input Current2 . . . . . . . . . . . . . . . . . . . . 25 mA Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . Supply Voltage Output Short-Circuit Duration . . . . . . . . . . . . . . . Continuous Storage Temperature Range P, S, Z Package . . . . . . . . . . . . . . . . . . . . -65C to +150C Lead Temperature Range (Soldering, 60 sec) . . . . . . . . 300C Junction Temperature (TJ) . . . . . . . . . . . . . -65C to +150C Operating Temperature Range OP270E, OP270F, OP270G . . . . . . . . . . . -40C to +85C NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 The OP270's inputs are protected by back-to-back diodes. Current limiting resistors are not used, in order to achieve low noise performance. If differential voltage exceeds +10 V, the input current should be limited to 25 mA. ORDERING GUIDE Model OP270EZ OP270FZ OP270GP OP270GS TA = +25C VOS Max ( V) 75 150 250 250 JC (C/W) 12 12 37 27 JA* (C/W) 134 134 96 92 Temperature Range XIND XIND XIND XIND Package Description 8-Lead CERDIP 8-Lead CERDIP 8-Lead PDIP 16-Lead SOIC Package Option Q-8 (Z-Suffix) Q-8 (Z-Suffix) N-8 (P-Suffix) RW-16 (S-Suffix) *JA is specified for worst-case mounting conditions, i.e., JA is specified for device in socket for CERDIP and PDIP packages; JA is specified for device soldered to printed circuit board for SOIC package. For military processed devices, please refer to the Standard Microcircuit Drawing (SMD) available at www.dscc.dla.mil/programs/milspec/default.asp. SMD Part Number 5962-8872101PA ADI Equivalent OP270AZMDA CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the OP270 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE -4- REV. C Typical Performance Characteristics- OP270 4 AT 10Hz NOISE VOLTAGE (100nV/DIV) VOLTAGE NOISE (nV/ Hz) 5 4 3 1/f CORNER = 5Hz 2 VOLTAGE NOISE (nV/ Hz) 10 9 8 7 6 TA = 25 C VS = 15V 5 TA = 25 C 0.1Hz TO 10Hz NOISE 3 AT 1kHz 2 1 1 1 10 100 FREQUENCY (Hz) 1k 0 5 15 10 SUPPLY VOLTAGE (V) 20 TA = 25 C VS = 15V TIME (1sec/DIV) TPC 1. Voltage Noise Density vs. Frequency TPC 2. Voltage Noise Density vs. Supply Voltage TPC 3. 0.1 Hz to 10 Hz Input Voltage Noise 10 30 CHANGE IN OFFSET VOLTAGE ( A) TA = 25 C VS = 15V 40 VS = 15V 5 TA = 25 C VS = 15V 4 CURRENT NOISE (pA/ Hz) VOLTAGE NOISE (nV/ Hz) 20 10 0 -10 -20 3 1.0 2 1/f CORNER = 200Hz 1 0.1 10 100 1k FREQUENCY (Hz) 10k -30 0 25 50 75 -75 -50 -25 TEMPERATURE ( C) 0 100 125 0 1 2 3 TIME (Minutes) 4 5 TPC 4. Current Noise Density vs. Frequency TPC 5. Input Offset Voltage vs. Temperature TPC 6. Warm-Up Offset Voltage Drift 7 5 VS = 15V VCM = 0V VS = 15V VCM = 0V 7 TA = 25 C VS = 15V INPUT BIAS CURRENT (nA) 5 3 INPUT BIAS CURRENT (nA) 0 25 50 75 100 125 6 INPUT OFFSET CURRENT (nA) 4 6 5 4 2 4 3 1 3 2 -75 -50 -25 0 25 50 75 100 125 0 -75 -50 -25 TEMPERATURE ( C) TEMPERATURE ( C) 2 -10.0 -5.0 0.0 5.0 10.0 -12.5 -7.5 -2.5 2.5 7.5 12.5 COMMON-MODE VOLTAGE (V) TPC 7. Input Bias Current vs. Temperature TPC 8. Input Offset Current vs. Temperature TPC 9. Input Bias Current vs. Common-Mode Voltage REV. C -5- OP270 130 120 110 100 90 CMR (dB) 6 8 7 6 5 4 3 2 1 VS = 15V TA = 25 C VS = 15V TOTAL SUPPLY CURRENT (mA) 5 80 70 60 50 40 30 20 10 1 10 100 1k 10k FREQUENCY (Hz) 100k 1M 4 +125 C +25 C 3 -55 C TOTAL SUPPLY CURRENT (mA) 2 0 5 10 15 SUPPLY VOLTAGE (V) 20 0 -75 -50 -25 25 75 0 50 TEMPERATURE ( C) 100 125 TPC 10. CMR vs. Frequency TPC 11. Total Supply Current vs. Supply Voltage TPC 12. Total Supply Current vs. Temperature 140 TA = 25 C 120 140 120 VOLTAGE GAIN (dB) 80 TA = 25 C VS = 15V CLOSED-LOOP GAIN (dB) TA = 25 C VS = 15V 60 100 100 80 60 40 20 0 PSR (dB) 80 60 40 20 +PSR 40 -PSR 20 0 0 1 10 100 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) 1 10 100 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) -20 1k 10k 100k 1M FREQUENCY (Hz) 10M TPC 13. PSR vs. Frequency TPC 14. Open-Loop Gain vs. Frequency TPC 15. Closed-Loop Gain vs. Frequency 25 20 15 GAIN (dB) PHASE SHIFT (Degrees) PHASE MARGIN (Degrees) PHASE 100 120 140 OPEN-LOOP GAIN (V/mV) 4000 70 7 10 GAIN 5 0 -5 PHASE MARGIN = 62 3000 60 6 160 180 2000 50 GBP 5 1000 4 -10 1 2 3 45 FREQUENCY (Hz) 6 7 8 9 10 0 0 5 10 15 SUPPLY VOLTAGE (V) 20 25 40 -75 -50 -25 0 25 50 75 100 125 150 TEMPERATURE ( C) TPC 16. Open-Loop Gain Phase Shift vs. Frequency TPC 17. Open-Loop Gain vs. Supply Voltage TPC 18. Gain-Bandwidth Phase Margin vs. Temperature -6- REV. C GAIN BANDWIDTH PRODUCT (MHz) TA = 25 C VS = 15V 80 5000 80 8 OP270 28 PEAK-TO-PEAK AMPLITUDE (V) 24 20 16 12 8 4 TA = 25 C VS = 15V THD = 1% MAXIMUM OUTPUT ( V) 15 TA = 25 C 14 VS = 15V 13 POSITIVE SWING 50 TA = 25 C VS = 15V VIN = 100mV 40 AV = +1 OVERSHOOT (%) 12 11 10 9 8 7 6 NEGATIVE SWING 30 20 10 0 1k 10k 100k 1M FREQUENCY (Hz) 10M 5 1k 10k LOAD RESISTANCE ( ) 100k 0 0 200 600 800 400 CAPACITIVE LOAD (pF) 1000 TPC 19. Maximum Output Swing vs. Frequency TPC 20. Maximum Output Voltage vs. Load Resistance TPC 21. Small-Signal Overshoot vs. Capacitive Load 100 2.8 TA = +25 C VS = 15V VS = 15V CHANNEL SEPARATION (dB) 190 180 170 160 150 140 130 120 110 100 90 TA = 25 C 80 VS = 15V VO = 20V p-p TO 10kHz 70 10 100 1 1k 10k FREQUENCY (Hz) 2.7 OUTPUT IMPEDANCE ( ) 75 AV = 1 SLEW RATE (V/ s) 2.6 50 AV = 10 AV = 100 2.5 -SR 2.4 +SR 2.3 25 0 1k 10k 100k 1M FREQUENCY (Hz) 10M 2.2 -75 -50 -25 25 75 0 50 TEMPERATURE ( C) 100 125 100k 1M TPC 22. Output Impedance vs. Frequency TPC 23. Slew Rate vs. Temperature TPC 24. Channel Separation vs. Frequency 0.1 TA = 25 C VS = 15V VO = 20V p-p RL =2k AV = 10 DISTORTION (%) 0.01 AV = 1 5V 20 s 50mV TA = 25 C VS = 15V AV = +1 RL = 2k 200nS 0.001 10 100 1k FREQUENCY (Hz) 10k TA = 25 C VS = 15V AV = +1 RL = 2k TPC 25. Total Harmonic Distortion vs. Frequency TPC 26. Large Signal Transcient Response TPC 27. Small-Signal Transient Response REV. C -7- OP270 5k TOTAL NOISE AND SOURCE RESISTANCE The total noise of an op amp can be calculated by: 500 1/2 OP270 V1 20Vp-p En = where: (en ) + (in RS ) + (et ) 2 2 2 5k En = total input referred noise en = op amp voltage noise in = op amp current noise V2 V CHANNEL SEPARATION = 20 log 2 1 50 1/2 OP270 et = source resistance thermal noise RS = source resistance The total noise is referred to the input and at the output would be amplified by the circuit gain. Figure 3 shows the relationship between total noise at 1 kHz and source resistance. For RS < 1 kW the total noise is dominated by the voltage noise of the OP270. As RS rises above 1 kW, total noise increases and is dominated by resistor noise rather than by the voltage or current noise of the OP270. When RS exceeds 20 kW, current noise of the OP270 becomes the major contributor to total noise. 100 V /1000 Figure 1. Channel Separation Test Circuit +18V 8 100k 2 1/2 OP270 1 3 200k 6 1/2 OP270 7 5 100k TOTAL NOISE (nV/ Hz) OP200 10 4 -18V OP270 RESISTOR NOISE ONLY 1 100 1k 10k 100k Figure 2. Burn-In Circuit APPLICATIONS INFORMATION VOLTAGE AND CURRENT NOISE RS - SOURCE RESISTANCE ( ) The OP270 is a very low noise dual op amp, exhibiting atypical / voltage noise of only 3.2 nV//Hz @ 1 kHz. The exceptionally low noise characteristic of the OP270 is achieved in part by operating the input transistors at high collector currents since the voltage noise is inversely proportional to the square root of the collector current. Current noise, however, is directly proportional to the square root of the collector current. As a result, the outstanding voltage noise performance of the OP270 is gained at the expense of current noise performance, which is normal for low noise amplifiers. To obtain the best noise performance in a circuit, it is vital to understand the relationship between voltage noise (en), current noise (in), and resistor noise (et). Figure 3. Total Noise vs. Source Resistance (Including Resistor Noise) at 1 kHz Figure 4 also shows the relationship between total noise and source resistance, but at 10 Hz. Total noise increases more quickly than shown in Figure 3 because current noise is inversely proportional to the square root of frequency. In Figure 4, current noise of the OP270 dominates the total noise when RS > 5 kW. Figures 3 and 4 show that to reduce total noise, source resistance must be kept to a minimum. In applications with a high source resistance, the OP200, with lower current noise than the OP270, will provide lower total noise. -8- REV. C OP270 100 TOTAL NOISE (nV/ Hz) Figure 5 shows peak-to-peak noise versus source resistance over the 0.1 Hz to 10 Hz range. Once again, at low values of RS, the voltage noise of the OP270 is the major contributor to peak-to-peak noise, with current noise the major contributor as RS increases. The crossover point between the OP270 and the OP200 for peak-to-peak noise is at RS = 17 kW. The OP271 is a higher speed version of the OP270, with a slew rate of 8 V/ms. Noise of the OP271 is slightly higher than that of the OP270. Like the OP270, the OP271 is unity-gain stable. For reference, typical source resistances of some signal sources are listed in Table I. RESISTOR NOISE ONLY 10 OP200 OP270 1 100 Table I. 1k 10k 100k RS - SOURCE RESISTANCE ( ) Figure 4. Total Noise vs. Source Resistance (Including Resistor Noise) at 10 Hz Device Strain gage Magnetic tapehead, microphone Magnetic phonograph cartridge Source Impedance <500 W <1500 W Comments Typically used in low frequency applications. Low IB very important to reduce self-magnetization problems when direct coupling is used. OP270 IB can be neglected. Similar need for low IB in direct coupled applications. OP270 will not introduce any self-magnetization problem. Used in rugged servo-feedback applications. Bandwidth of interest is 400 Hz to 5 kHz. 1000 OP200 PEAK-TO-PEAK NOISE (nV) <1500 W 100 OP270 RESISTOR NOISE ONLY Linear variable <1500 W differential transformer 10 100 1k 10k 100k RS - SOURCE RESISTANCE ( ) Figure 5. Peak-to-Peak Noise (0.1 Hz to 10 Hz) vs. Source Resistance (Includes Resistor Noise) R3 1.24k R1 5 R2 5 - OP270 DUT + + OP27E - R5 909 C1 2F R6 600 D1, D2 1N4148 + OP27E C4 0.22 F R10 65.4k R9 306k R11 65.4k C3 0.22 F + OP42E - R12 10k R13 5.9k R4 200 R14 4.99k C5 1F - eOUT R8 10k C2 0.032 F GAIN = 50,000 VS = 15V Figure 6. Peak-to-Peak Voltage Noise Test Circuit (0.1 Hz to 10 Hz) REV. C -9- OP270 NOISE MEASUREMENTS Peak-to-Peak Voltage Noise Noise Measurement -- Noise Voltage Density The circuit of Figure 6 is a test setup for measuring peak-to-peak voltage noise. To measure the 200 nV peak-to-peak noise specification of the OP270 in the 0.1 Hz to 10 Hz range, the following precautions must be observed: 1. The device has to be warmed up for at least five minutes. As shown in the warm-up drift curve, the offset voltage typically changes 2 mV due to increasing chip temperature after power-up. In the 10-second measurement interval, these temperature induced effects can exceed tens of nanovolts. 2. For similar reasons, the device has to be well shielded from air currents. Shielding also minimizes thermocouple effects. 3. Sudden motion in the vicinity of the device can also "feed through" to increase the observed noise. 4. The test time to measure noise of 0.1 Hz to 10 Hz should not exceed 10 seconds. As shown in the noise-tester frequency response curve of Figure 7, the 0.1 Hz corner is defined by only one pole. The test time of 10 seconds acts as an additional pole to eliminate noise contribution from the frequency band below 0.1 Hz. 100 The circuit of Figure 8 shows a quick and reliable method of measuring the noise voltage density of dual op amps. The first amplifier is in unity-gain, with the final amplifier in a noninverting gain of 101. As noise voltages of each amplifier are uncorrelated, they add in rms fashion to yield: E eOUT = 101A E (enA ) + (enB ) 2 2 The OP270 is a monolithic device with two identical amplifiers. The noise voltage density of each individual amplifier will match, giving: 2 E eOUT = 101A 2en = 101 2en E () R1 100 R2 10k - - 1/2 OP270 + 1/2 eOUT OP270 + TO SPECTRUM ANALYZER eOUT (nV/ Hz) = 101 ( 2en) VS = 15V 80 Figure 8. Noise Voltage Density Test Circuit R3 1.24k GAIN (dB) 60 R1 5 R2 100k - OP270 DUT + 40 - OP27E + enOUT TO SPECTRUM ANALYZER 20 R4 200 R5 8.06k GAIN = 10,000 VS = 15V 0 0.01 0.1 1.0 FREQUENCY (Hz) 10 100 Figure 9. Current Noise Density Test Circuit Noise Measurement -- Current Noise Density Figure 7. 0.1 Hz to 10 Hz Peak-to-Peak Voltage Noise Test Circuit Frequency Response 5. A noise-voltage-density test is recommended when measuring noise on a large number of units. A 10 Hz noise-voltage-density measurement will correlate well with a 0.1 Hz to 10 Hz peak-to-peak noise reading, since both results are determined by the white noise and the location of the 1/f corner frequency. 6. Power should be supplied to the test circuit by well bypassed low noise supplies, e.g., batteries. They will minimize output noise introduced via the amplifier supply pins. The test circuit shown in Figure 9 can be used to measure current noise density. The formula relating the voltage output to current noise density is: E enOUT A G - 40 nV / Hz E RS 2 in = ( ) 2 where: G = gain of 10,000 RS = 100 kW source resistance -10- REV. C OP270 CAPACITIVE LOAD DRIVING AND POWER SUPPLY CONSIDERATIONS APPLICATIONS Low Phase Error Amplifier The OP270 is unity-gain stable and capable of driving large capacitive loads without oscillating. Nonetheless, good supply bypassing is highly recommended. Proper supply bypassing reduces problems caused by supply line noise and improves the capacitive load driving capability of the OP270. In the standard feedback amplifier, the op amp's output resistance combines with the load capacitance to form a low-pass filter that adds phase shift in the feedback network and reduces stability. A simple circuit to eliminate this effect is shown in Figure 10. The added components, C1 and R3, decouple the amplifier from the load capacitance and provide additional stability. The values of C1 and R3 shown in Figure 10 are for a load capacitance of up to 1,000 pF when used with the OP270. V+ The simple amplifier depicted in Figure 12 utilizes a monolithic dual operational amplifier and a few resistors to substantially reduce phase error compared to conventional amplifier designs. At a given gain, the frequency range for a specified phase accuracy is over a decade greater than for a standard single op amp amplifier. The low phase error amplifier performs second-order frequency compensation through the response of op amp A2 in the feedback loop of A1. Both op amps must be extremely well matched in frequency response. At low frequencies, the A1 feedback loop forces V2 /(K1 + 1) = VIN. The A2 feedback loop forces Vo/(K1 + 1) = V2 /(K1 + 1), yielding an overall transfer function of VO /VIN = K1 + 1. The dc gain is determined by the resistor divider at the output, VO, and is not directly affected by the resistor divider around A2. Note that like a conventional single op amp amplifier, the dc gain is set by resistor ratios only. Minimum gain for the low phase error amplifier is 10. R2 R2 = R1 C3 0.1 F + C2 10 F R2 R2 K1 VIN R1 - OP270 + C1 200pF R3 50 VOUT C1 1000pF - 1/2 OP270E A2 + V2 C5 0.1 F V- C4 + 10 F PLACE SUPPLY DECOUPLING CAPACITOR AT OP270 VIN - 1/2 OP270E A1 + R2 R1 K1 Figure 10. Driving Large Capacitive Loads VO ASSUME A1 AND A1 ARE MATCHED. AO(s) = T s VO = (K1 + 1) V IN When Rf 100 W and the input is driven with a fast, large signal pulse (>1 V), the output waveform will look like the one in Figure 11. During the fast feedthrough-like portion of the output, the input protection diodes effectively short the output to the input, and a current, limited only by the output short-circuit protection, will be drawn by the signal generator. With Rf 500 W, the output is capable of handling the current requirements (IL 20 mA at 10 V); the amplifier will stay in its active mode and a smooth transition will occur. When Rf > 3 kW, a pole created by Rf and the amplifier's input capacitance (3 pF) creates additional phase shift and reduces phase margin. A small capacitor (20 pF to 50 pF) in parallel with Rf helps eliminate this problem. UNITY-GAIN BUFFER APPLICATIONS Figure 12. Low Phase Error Amplifier Figure 13 compares the phase error performance of the low phase error amplifier with a conventional single op amp amplifier and a cascaded two-stage amplifier. The low phase error amplifier shows a much lower phase error, particularly for frequencies where w/bwT < 0.1. For example, phase error of -0.1 occurs at 0.002 w/bwT for the single op amp amplifier, but at 0.11 w/bwT for the low phase error amplifier. Figure 11. Pulsed Operation REV. C -11- OP270 0 -1 PHASE SHIFT (Degrees) FIVE-BAND LOW NOISE STEREO GRAPHIC EQUALIZER SINGLE OP AMP. CONVENTIONAL DESIGN -2 -3 CASCADED (TWO STAGES) -4 -5 LOW PHASE ERROR AMPLIFIER -6 -7 0.001 The graphic equalizer circuit shown in Figure 14 provides 15 dB of boost or cut over a 5-band range. Signal-to-noise ratio over a 20 kHz bandwidth is better than 100 dB and referred to a 3 V rms input. Larger inductors can be replaced by active inductors, but this reduces the signal-to-noise ratio. DIGITAL PANNING CONTROL 0.01 0.005 0.05 FREQUENCY RATIO (1/ 0.1 )( / T) 0.5 1.0 Figure 15 uses a DAC8221, a dual 12-bit CMOS DAC, to pan a signal between two channels. One channel is formed by the current output of DAC A driving one-half of an OP270 in a current-to-voltage converter configuration. The other channel is formed by the complementary output current of DAC A, which normally flows to ground through the AGND pin. This complementary current is converted to a voltage by the other half of the OP-270, which also holds AGND at virtual ground. Gain error due to mismatching between the internal DAC ladder resistors and the current-to-voltage feedback resistors is eliminated by using feedback resistors internal to the DAC8221. Only DAC A passes a signal; DAC B provides the second feedback resistor. With VREFB unconnected, the current-to-voltage converter, using RFBB, is accurate and not influenced by digital data reaching DAC B. Distortion of the digital panning control is less than 0.002% over the 20 Hz to 20 kHz audio range. Figure 16 shows the complementary outputs for a 1 kHz input signal and a digital ramp applied to the DAC data input. DUAL PROGRAMMABLE GAIN AMPLIFIER Figure 13. Phase Error Comparison C1 0.47 F VIN R1 47k + 1/2 OP270E - C2 6.8 F + TANTALUM C3 1F + TANTALUM C4 0.22 F R4 1k L1 1H R6 1k L2 600mH R8 1k L3 180mH R10 1k L4 60mH R12 1k L5 10mH 10kHz 3kHz 800Hz 200Hz 60Hz R2 3.3k + 1/2 OP270E - R13 3.3k R14 100 VOUT R3 680 R5 680 R7 680 The dual OP270 and the DAC8221, a dual 12-bit CMOS DAC, can be combined to form a space-saving dual programmable amplifier. The digital code present at the DAC, which is easily set by a microprocessor, determines the ratio between the internal feedback resistor and the resistance the DAC ladder presents to the op amp feedback loop. Gain of each amplifier is VOUT 4096 =- VIN n where n equals the decimal equivalent of the 12-bit digital code present at the DAC. If the digital code present at the DAC consists of all zeros, the feedback loop will open, causing the op amp output to saturate. A 20 MW resistor placed in parallel with the DAC feedback loop eliminates this problem with only a very small reduction in gain accuracy. R9 680 C5 0.047 F R11 680 C6 0.022 F Figure 14. 5-Band Low Noise Graphic Equalizer -12- REV. C OP270 +5V 21 DAC8221HP VDD 0.01 F RFBA 3 VINA 3 DAC8221HP +15V +15V +5V 21 VDD RFBA 20M DAC A IOUTA 2 2 - 8 1 VOUTA VREFA 4 + - 10 F 0.01 F + - VIN 4 VREFA DAC A IOUTA 2 2 - 8 1 OUT 10 F 1/2 OP270GP AGND DAC DATA BUS PINS 6 (MSB) - 17 (LSB) 1 3 + 4 1/2 OP270EZ 3 AGND + 4 1 0.1 F RFBB 22 VREFB 23 6 -15V - 10 F + VINB 23 RFBB IOUTB 24 -15V - 0.1 F - 10 F + DAC B 6 NC DAC B IOUTB 24 - 1/2 OP270GP 7 OUT DAC DATA BUS PINS 6 (MSB) - 17 (LSB) 18 WRITE CONTROL 19 20 DGND 5 VREFB 20M 5 1/2 OP270GP + 7 VOUTB 18 DAC A/DAC B 5 + 22 WRITE CONTROL 19 20 CS WR DGND 5 Figure 17. Dual Programmable Gain Amplifier Figure 15. Digital Panning Control A OUT A OUT 5V 5V 1ms Figure 16. Digital Panning Control Output REV. C -13- OP270 OUTLINE DIMENSIONS 8-Lead Ceramic Dual In-Line Package [CERDIP] Z-Suffix (Q-8) Dimensions shown in inches and (millimeters) 0.005 (0.13) MIN 8 8-Lead Plastic Dual In-Line Package [PDIP] P-Suffix (N-8) Dimensions shown in inches and (millimeters) 0.375 (9.53) 0.365 (9.27) 0.355 (9.02) 8 5 0.055 (1.40) MAX 5 PIN 1 1 4 0.310 (7.87) 0.220 (5.59) 1 4 0.295 (7.49) 0.285 (7.24) 0.275 (6.98) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.015 (0.38) MIN SEATING PLANE 0.060 (1.52) 0.050 (1.27) 0.045 (1.14) 0.100 (2.54) BSC 0.405 (10.29) MAX 0.200 (5.08) MAX 0.200 (5.08) 0.125 (3.18) 0.023 (0.58) 0.014 (0.36) 0.060 (1.52) 0.015 (0.38) 0.150 (3.81) MIN SEATING 0.070 (1.78) PLANE 0.030 (0.76) 15 0 0.015 (0.38) 0.008 (0.20) 0.320 (8.13) 0.290 (7.37) 0.180 (4.57) MAX 0.150 (3.81) 0.130 (3.30) 0.110 (2.79) 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) 0.100 (2.54) BSC 0.150 (3.81) 0.135 (3.43) 0.120 (3.05) 0.015 (0.38) 0.010 (0.25) 0.008 (0.20) CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETERS DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN COMPLIANT TO JEDEC STANDARDS MO-095AA CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN 16-Lead Standard Small Outline Package [SOIC] Wide Body S-Suffix (RW-16) Dimensions shown in millimeters and (inches) 10.50 (0.4134) 10.10 (0.3976) 16 9 7.60 (0.2992) 7.40 (0.2913) 1 8 10.65 (0.4193) 10.00 (0.3937) 1.27 (0.0500) BSC 0.30 (0.0118) 0.10 (0.0039) 0.51 (0.0201) 0.33 (0.0130) 2.65 (0.1043) 2.35 (0.0925) 0.75 (0.0295) 0.25 (0.0098) 45 COPLANARITY 0.10 SEATING PLANE 0.32 (0.0126) 0.23 (0.0091) 8 0 1.27 (0.0500) 0.40 (0.0157) COMPLIANT TO JEDEC STANDARDS MS-013AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN -14- REV. C OP270 Revision History Location 4/03--Data Sheet changed from REV. B to REV. C. Page Deletion of OP270A model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Universal Edits to FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Edits to CONNECTION DIAGRAMS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Changes to SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Deletion of WAFER LIMITS and DICE CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Changes to ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Changes to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Changes to equations in Noise Measurements section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Change to Figure 10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 11/02--Data Sheet changed from REV. A to REV. B. Updated ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 9/02--Data Sheet changed from REV. 0 to REV. A. Edits to ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Edits to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 REV. C -15- -16- C00325-0-4/03(C) |
Price & Availability of OP270EZ
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